As the DRAM cell is scaled towards the 1 Gb DRAM level and beyond, innovative cell concepts are needed to push the cell area to practical limits. For conventional folded bitline DRAM cells, the lithography-limited minimum cell area is 8 lithographic squares. Although conventional open bitline cells have a lithography-limited cell area of only 4 lithographic squares, folded bitline cells are preferred because of their inherently lower noise sensitivity. Thus, open bitline cells are usually not used in manufacturing, and therefore any practical method to further reduce the limiting cell area of the conventional folded bitline cell will be useful.